1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device and a method for fabricating the same, and more particularly, this application relates to a semiconductor integrated circuit device having an improved operating characteristic and a method for fabricating the same.
2. Description of the Related Art
Semiconductor integrated circuit devices such as a system-on-chip (SOC), a microcontroller unit (MCU), and a display driver IC (DDI) include a plurality of peripheral devices such as a processor, a memory, a logic circuit, an audio and image processing circuit, and various interface circuits. Thus, the semiconductor integrated circuit devices include transistors having various driving voltages. For example, a high voltage (15-30V) driving transistor, an intermediate voltage (4-6V) driving transistor, and a low voltage (1-3V) driving transistor may be included in a semiconductor integrated circuit device.
In particular, in order for a high voltage driving transistor to operate normally even when a high voltage is applied, a breakdown voltage between a drain region of the high voltage driving transistor and a semiconductor substrate should be sufficiently high. Thus, a heavily doped region of the drain region and a gate electrode are sufficiently spaced apart to increase the breakdown voltage, and the doping concentration of a lightly doped region of the drain region and the semiconductor substrate are reduced to enlarge a depletion region. Accordingly, the thickness of a gate insulating layer of the high voltage driving transistor is larger than that of a gate insulating layer of the low voltage driving transistor.
After the high voltage driving transistor is manufactured, a back-end process of forming a multi-layered interconnection line and a multi-layered insulating layer is performed. A subsequent process is usually a plasma process such as conductive layer etching or photoresist layer ashing. Vacuum ultraviolet (VUV) rays are generated during the plasma process to irradiate the semiconductor substrate, and thus positive electric charges (or negative electric charges) are deposited on a gate insulating layer and/or a device isolation layer. Since the doping concentration of the lightly doped region of the drain region and the semiconductor substrate are low, a small change in electrical charges caused by the VUV rays causes a significant change in the characteristic of the high voltage driving transistor.
For example, in the case of an NMOS high voltage driving transistor, positive electrical charges deposited on a gate insulating layer form a channel under the gate insulating layer, thereby increasing a drain-off current (Idoff). In addition, positive electrical charges deposited on a device isolation layer form an inversion layer on the device isolation layer and a P-well interface and generate an isolation current (Isol) between a drain region and an N-well of an adjacent PMOS high voltage driving transistor, thereby reducing an isolation effect.